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march 2013 ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1. 1.0 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection FSA9280A usb port multimedia switch featuring automatic select and accessory detection features signals audio, usb, uart, usb charging switch mechanism automatic switching with available interrupt accessory detection headsets (headphone/mic/remote) usb data port (sdp) uart serial link usb chargers (car-kit, cdp, dcp) factory-mode tty converter usb fs and hs 2.0 compliant usb charging battery charging 1.1 compliant (including optional dcd) integrated power fet over-voltage tolerance ( ov t) 28v over-current protection (ocp ) 1.5a over-voltage protection (ovp) 6.8v audio left, right, mic, tty v bat 3 to 4.4v programmability i 2 c esd 15 kv iec 61000-4-2 air gap package 20 -lead umlp (3 x 4 x 0.55mm, 0.5mm pitch) ordering information FSA9280Aumx description the FSA9280A is a high-performance multimedia switch featuring automatic switching and accessory detection for the usb port. th is switch allows sharing of a common usb port to pass audio, usb data / charging, as well as factory programmability. in addition, the FSA9280A integrates detection of accessories; such as headphones, headsets (mic / button), car chargers, usb chargers, and uart data cables; with the ability to use a common usb connector. the FSA9280A can be programmed for manual or automatic switching of data paths based on accessory detected. FSA9280A includes an integrated 28v over-voltage and 1.5a over-current protected fet. applications ? mobile phones & portable media players related resources ? FSA9280A evaluation board ? evaluation board users guide ? for samples, questions or board requests; please contact analogswitch@fairchildsemi.com figure 1. typical application FSA9280A
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 2 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection table of contents features ....................................................................................................................................................................................... 1 description ................................................................................................................................................................................... 1 applications .................................................................................................................................................................................. 1 related resources ....................................................................................................................................................................... 1 table of contents ......................................................................................................................................................................... 2 block diagram .............................................................................................................................................................................. 3 pin configuration .......................................................................................................................................................................... 3 pin descriptions ........................................................................................................................................................................... 4 1. functionality .......................................................................................................................................................................... 5 1.1. functional overview ................................................................................................................................................... 5 2. power-up & reset ................................................................................................................................................................ . 6 2.1. reset .......................................................................................................................................................................... 6 2.1.1. hardware reset ............................................................................................................................................... 6 2.1.2. software reset ................................................................................................................................................ 6 3. i 2 c ......................................................................................................................................................................................... 7 4. configuration ......................................................................................................................................................................... 8 5. detection ............................................................................................................................................................................... 8 5.1. usb port detection ................................................................................................................................................... 10 5.2. audio accessory detection ....................................................................................................................................... 12 5.3. ocp and ovp detection .......................................................................................................................................... 13 6. processor communication .................................................................................................................................................. 13 7. switch configuration ........................................................................................................................................................... 13 7.1. manual switching ...................................................................................................................................................... 14 8. active signal performance .................................................................................................................................................. 15 8.1. usb data .................................................................................................................................................................. 15 8.2. fs usb ..................................................................................................................................................................... 15 8.3. audio ........................................................................................................................................................................ 15 9. electrical specifications ...................................................................................................................................................... 16 9.1. absolute maximum ratings ...................................................................................................................................... 16 9.2. recommended operating conditions ....................................................................................................................... 16 9.3. switch path dc electrical characteristics ................................................................................................................. 16 9.4. capacitance .............................................................................................................................................................. 18 9.5. switch path ac electrical characteristics ................................................................................................................. 18 9.6. i 2 c controller dc characteristics .............................................................................................................................. 19 9.7. i 2 c ac electrical characteristics & register map ..................................................................................................... 19 9.8. factory modes .......................................................................................................................................................... 23 9.8.1. factory-mode accessory detection ............................................................................................................... 23 10. reference schematic .......................................................................................................................................................... 26 11. layout guidelines ............................................................................................................................................................... 27 11.1. pcb layout guidelines for high-speed usb signal integrity .................................................................................. 27 11.2. layout for gsm/tdma buzz reduction ................................................................................................................... 27 11.3. v bus_out load timing requirements ........................................................................................................................ 27 11.4. systems with multiple usb controllers .................................................................................................................... 28 physical dimensions .................................................................................................................................................................. 29
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 3 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection block diagram figure 2. block diagram pin configuration figure 3. pin assignments (top view) baseband processor v bus_in micro usb dm_con dp_con gnd id_con hs usb intb i2c_scl i2c_sda v ddio dp_host dm_host i 2 c fs usb or uart audio codec audio_r audio_l rxd txd interrupt FSA9280A mic phone power float detect charger detect switch control and i 2 c slave - detection ocp,ovp 3:1 mux and charge pump v bat adc id detect chg_det jig boot charger ic v bus_out 7 8 9 10 13 14 15 2 3 16 20 19 18 17 4 id_con dp_con dm_con v bus_in chg_det v bus_out i2c_scl i2c_sda txd boot v ddio jig audio_r audio_l mic dp_host 11 12 5 6 intb v bat dm_host rxd 1 gnd exposed dap
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 4 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection pin descriptions name pin # type default state description usb interface dp_host 4 signal path open d+ signal switch path, dedicated usb port to be connected to the resident usb transceiver on the phone dm_host 5 signal path open d- signal switch path , dedicated usb port to be connected to the resident usb transceiver on the phone audio interface audio_l 2 signal path open left audio channel from mobile phone audio-out codec audio_r 1 signal path open right audio channel from mobile phone audio-out codec mic 3 signal path open connected to the mobile phone audio codec mic input pin uart interface txd 7 signal path open transmitter ( tx ) from resident uart on the mobile phone rxd 6 signal path open receiver ( rx ) from resident uart on the mobile phone connector interface id_con 20 signal path open connected to the usb connector id pin and used for detecting accessories or button presses dp_con 19 signal path open connected to the usb connector d+ pin ; d epending on the signaling mode, this pin can be switched to dp_host , audio _r , or rx d pins dm_con 18 signal path open connected to the usb connector d- pin ; d epending on the signaling mode, this pin can switched to dm_host , audio_l, or txd pin s v bus_in 17 power path n/a input voltage supply pin to be connected to the v bus pin of the usb connector power interface v bat 11 power n/a input voltage supply pin to be connected to the mobile phone batter y output or to an internal regulator on the phone v ddio 9 power n/a baseband processor interface i/o supply pin gnd exposed center pad ground n/a ground (center ground pad of package makes electrical contact) charger interface v bus_out 15 power path n/a output voltage supply pin to be connected to the source voltage pin on the charger ic chg_det 16 open-drain output hi -z open-drain active low output, used to signal the charger ic that a charger has been attached factory interface jig 10 open-drain output hi -z output control signal driven by the FSA9280A and used by the processor for factory test modes boot 8 cmos output low output control signal driven by the FSA9280A and used by the processor for factory test modes i 2 c interface i2c_scl 14 input hi -z i 2 c serial clock signal to be connected to the phone-based i 2 c master i2c_sda 13 open-drain i/o hi -z i 2 c serial data signal to be connected to the phone-based i 2 c master intb 12 cmos output low interrupt active low output used to prompt the phone baseband processor to read the i 2 c register bits , i ndicates a change in id _con pin stat us or accessory attach status
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 5 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 1. functionality the FSA9280A offers a complete solution for a single 5-pin usb interface. through built-in detection algorithms that monitor the id and v bus pins of the usb interface, the FSA9280A allows seamless sharing of the interface between hs usb, fs usb or uart, and audio sources. the FSA9280A also offers a complete solution for multiple types of usb chargers. the FSA9280A detects different usb charger types an d has a dedicated charger ic interface to allow charging through the devices and dynamic current control by the charger ic based on the type of charger detected. additional over-current protection (ocp) and up to 28v over-voltage tolerance (ovt ) is provided . the detection features are capable of monitoring th e id pin of the usb interface to detect a full array of usb acc essories, including audio accessories with up to 12 buttons. 1.1. functional overview the FSA9280A is designed for minimal software requirements for proper operation. the flow diagram below shows the basic steps of operation and contains references to more detailed information. flow diagram state datasheet section description power-up & reset section 2 applying power to the device and reset states of the device. i 2 c section 3 communication with device through i 2 c (which can be bypassed during power- up) . configuration section 4 configuring the device using i 2 c and the internal registers (which can be bypassed during power-up). detection section 5 how the detection of the accessory is done including attachment and detachment. processor communication section 6 how the detection of the accessory is indicated to the processor. switch configuration section 7 configuration of switches based on detection. active signal section 8 signal performance of selected configuration power- up & reset accessory plug-in i 2 c detection processor communication switch configuration active signals accessory detached configuration
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 6 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 2. power-up & reset the FSA9280A does not need special power sequencing for correct operation. the main power of the device is provided by either v bus_in or v bat . if v bus_in is not present and v bat is applied, v bat is used to power the device. v ddio is only used for i 2 c interface and interrupt processing. table 1 summarizes the enabled features of each power state of the FSA9280A. the valid voltages levels for each power supply can be found in section 9.2. table 1 C power states summary notes: 1. v ddio is expected to be the same supply used by the baseband i/o?s. 2. this is not a typical state : b oth v bat and v ddio are typically provided simultaneously. 2.1. reset when the device is reset, all the registers are initialized to the default values shown in table 7 and all switch paths are open. after reset or power up, the FSA9280A enters standby mode and is ready to detect accessories sensed on its v bus_in and / or id_con pins. 2.1.1. hardware reset there are three hardware reset mechanisms: ? power-on reset caused by the initial rising edge of v bus or v bat ? the falling edge of v ddio . ? with v ddio valid, driving both i2c_sda and i2c_scl signals low for at least 30ms. note: 3. i 2 c controllers that implement clock stretching could cause reset. in this case, gpios could be used for the i 2 c interface. 2.1.2. software reset the device can be reset through software by writing to the reset bit in the register (1bh). valid v bus_in valid v bat valid v ddio (1) power state enabled functionality charging through fet processor communication (i 2 c & interrupts) detection no no no power down no no no no no yes (2 ) illegal state no yes no powered from v bat no no yes no yes yes powered from v bat no yes yes yes no no powered from v bus_in yes no yes yes yes no powered from v bat yes no yes yes no yes (2 ) powered from v bus_in yes yes yes yes yes yes powered from v bat yes yes yes
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 7 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 3. i 2 c the FSA9280A integrates a fast-mode i 2 c slave controller compliant with the i 2 c specification version 2.1 requirements . the FSA9280A i 2 c interface runs up to 400khz. the slave address is shown in table 2 . status information and configuration occurs via the i 2 c interface. please see section 9.7 for more information. table 2 C i 2 c slave address name size (bits) bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 slave address 8 0 1 0 0 1 0 1 read / write 8bits 8bits 8bits s slave address wr a register address k a write data a write data k+1 a write data k+2 a write data k+n - 1 a p note: single byte write is initiated by master with p immediately following first data byte. figure 4. i 2 c write sequence figure 5. i 2 c read sequence figure 6. i 2 c reset mode timing s wr a a s rd a a a na p register address to read specified note: 8bits if register is not specified master will begin read f rom current register. in this case only sequence showi ng in red bracket is needed single or multi byte read executed from current regist er location (single byte read is initiated by master with na immediately following fir st data byte) read data k+1 read data k+n-1 8bits 8bits 8bits slave address register address k read data k slave address from master to slave s start condition na not acknowledge (sda high) rd read =1 from slave to master a acknowledge (sda low) wr write=0 p stop condition v bat v ddio sda scl internal reset time 30ms 30ms 400s 400s idle standby idle standby
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 8 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 4. configuration FSA9280A requires minimal configuration for proper detection and reporting. the following steps can be followed for full configuration. in many cases, only step 5 needs to be implemented for proper operation. 1. write control register (02h) to configure different switching configurations and wait timing. 2. write interrupt mask 1 and 2 registers (05h, 06h) to mask any interrupts not required in the application. 3. write timing set 1 (08h) register to program required k ey -press timing and adc-detection timing. 4. write timing set 2 (09h) register to program required switching wait timing and long key press timing. 5. write control register (02h) to clear int mask bit. this enables interrupts to the baseband. 5. detection the FSA9280A detection algorithms monitor both the v bus and id pins of the usb interface. based on the detection results, multiple registers are updated and the intb pin is asserted to indicate to the baseband processor that an accessory was detected and to read the registers for the complete informat ion . the detection algorithm allows the application to control the timing of the detection algorithm and the configuration of the internal switches. the flow diagram in figure 7 shows the operation of the detection algorithm. figure 7. detection flow chart FSA9280A standby mode accessory plug- in FSA9280A detects accessory type is accessory detected a usb or factory mode set intb pin low (int mask bit must have been cleared by p) vddio =0v ? p reads FSA9280A interrupt registers FSA9280A waits switching wait time FSA9280A auto- conf igures switch paths FSA9280A writes device type r egisters and attach interrupt FSA9280A writes device type r egisters and attach interrupt FSA9280A set intb pin low (int mask bit must have been cleared by p) p reads FSA9280A interrupt registers wait bit = 1 ? FSA9280A takes no action until wait bit is set high by processor manual switch = 1 ? FSA9280A auto- conf igures switch paths FSA9280A conf igures switches according to manual sw 1 /2 registers detach ? FSA9280A writes detach interrupt and clears device type register FSA9280A set s intb pin low (int mask bit must have been cleared by p) detach ? FSA9280A writes detach interrupt FSA9280A sets intb pin low (int mask bit must have been cleared by p) yes yes yes yes yes yes no no no no no no
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 9 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection the FSA9280A monitors both v bus_in and id_con to detect accessories. the id_con detection is a resistive detection that detects the resistance to gnd on the id_con pin to determine which accessory is attached. table 3 shows the assignment of accessories based on resistor values. table 3. id_con accessory detection binary value (4) id_con resistance to gnd accessory detected (5) min. typ. max. 00000 gnd gnd gnd do not use 00001 1.9k ? 2 .0 k ? 2.1k ? audio send/end button 00010 2.470k ? 2.604k ? 2.730k ? audio remote s1 button (6) 00011 3.050k ? 3.208k ? 3.370k ? audio remote s2 button (6) 00100 3.810k ? 4.014k ? 4.210k ? audio remote s3 button (6) 00101 4.58k ? 4.82k ? 5.06k ? audio remote s4 button (6) 00110 5.73k ? 6.03k ? 6.33k ? audio remote s5 button (6) 00111 7.63k ? 8.03k ? 8.43k ? audio remote s6 button (6) 01000 9.53k ? 10.03k ? 10.53k ? audio remote s7 button (6) 01001 11.43k ? 12.03k ? 12.63k ? audio remote s8 button (6) 01010 13.74k ? 14.46k ? 15.18k ? audio remote s9 button (6) 01011 16.40k ? 17.26k ? 18.12k ? audio remote s10 button (6) 01100 19.48k ? 20.50k ? 21.53k ? audio remote s11 button (6) 01101 22.87k ? 24.07k ? 25.27k ? audio remote s12 button (6) 01110 27.27k ? 28.70k ? 30.14k ? reserved accessory #1 01111 32.3k ? 34 .0 k ? 35.7k ? reserved accessory #2 10000 38.19k ? 40.20k ? 42.21k ? reserved accessory #3 10001 47.41k ? 49.90k ? 52.40k ? reserved accessory #4 10010 61.66k ? 64.90k ? 68.15k ? reserved accessory #5 10011 76.1k ? 80.7k ? 84.1k ? do not use 10100 96.9k ? 102 .0 k ? 107.1k ? do not use 10101 115k ? 121k ? 127k ? tty converter 10110 143k ? 150k ? 157k ? uart cable 10111 190 k ? 200k ? 2 06 k ? usb: see table 4 11000 24 7.3k ? 255k ? 26 2.7k ? factory mode boot off-usb 11001 292k ? 301k ? 31 0k ? factory mode boot on-usb 11010 347 k ? 365k ? 383k ? audio cradle 11011 428.7k ? 442 .0 k ? 4 55 .3k ? usb: see table 4 11100 507 .3 k ? 523k ? 538.7k ? factory mode boot off-uart 11101 600.4k ? 619k ? 637.6k ? factory mode boot on-uart 11110 750 k ? 1000k ? 1050k ? audio type 1 with remote (8) 750k ? 1002k ? 1050k ? audio type 1 / only send-end (8) 11111 20m ? ??? open ??? usb mode, dedicated charger or accessory detach notes: 4. the binary values are reported in the binary register (07h) with each valid accessory detection. 5. the accessory type is reported in the device type 1 (0bh), device type 2 (0bh), button 1 (0ch), and button 2 (0dh) registers with each valid accessory detection. 6. these resistor values are created by multiple standard resistor values in series to form the button presses on the wired remote (s ee figure 12) . 7. for the id float, id o pen is recommended; otherwise, capacitance should be minimized. 8. audio devices with remote and audio devices with only send/end are both reported as audio type 1 in the device type 1 register (see the audio accessory detection section below) . type 1 is for passive resistor audio accessories and a future audio type 2 is designated for active audio accessories.
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 10 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 200ms switch state intb asserted accessory attached id resistance xxxxxx float intb pin bb reads intb 10ms wait time bb read and clear configured switch closes closed open figure 8. id -based accessories, no v bus_in attach timing with default switching wait bits of 10ms 5.1. usb port detection the multiple types of usb 2.0 ports that the FSA9280A can detect are summarized in table 4. these devices are unique in that v bus must be present to detect these accessories. table 4. id_con and v bus _in detection f or usb devices adc value (9) v bus_in dp_con dp_con id_con resistance to gnd accessory detected ( 10 ) min. typ. max. 10111 5v x x 190k ? 200k ? 2 06 k ? car kit type 1 charger ( 11 ) 11011 5v x x 428.7k ? 442k ? 455.3k ? car kit type 2 charger ( 11 ) 11111 5v ( 12 ) ( 12 ) 20 m ? open open usb dedicated charging port, travel adapter or dedicated charger (dcp) 11111 5v ( 12 ) ( 12 ) 20 m ? open open usb charging downstream port (cdp) 11111 5v ( 12 ) ( 12 ) 20 m ? open open usb standard downstream port (sdp) notes: 9. the adc values are reported in the adc register (07h) with an each valid accessory detection. 10. the accessory type is reported in the device type 1 (0bh) and car kit status (0eh) registers with an each valid accessory detection. 11. follows the ansi/cea-9 36 -a usb car kit specification. 12. the FSA9280A follow the battery charging 1.1 specification, which uses dp_con and dm_con to determine what usb accessory is attached (refer to the specification for details) .
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 11 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection the following figures show the attach timing of the usb accessories and the relationship between the intb assertion and the chg_det assertion. FSA9280A implements the optional data contact detection (dcd) feature of the usb battery charging specification. the dcd detection ensures proper connection of the dp_con and dm_con before starting the usb charging detection scheme. this feature allows for shorter attach times by eliminating long wait times to allow full contact of the dp_con and dm_con pins. v bus voltage vbus_out charger fet closed intb asserted and registers written v bus >4.0v xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx float float id resistance dcd-20ms chg detection 150ms intb pin 100ms chg_det pin switch state 170ms closed (cdp only) figure 9. usb dedicated charging port (dcp) or charging downstream port (cdp) attach timing 130ms vbus_in vbus_out usb switch state charger fet closed usb switches closed v bus >4.0v xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx float float id resistance closed open dcd checking 20ms charger detection time 110ms figure 10. usb standard downstream port attach timing v bus voltage v bus >4.0v id resistance xxxxxxxx float vbus_out id detection time 200ms intb pin 200ms 100ms chg_det pin switch state charger fet closed configured switches closed open figure 11. car kit type 1 and 2 attach timing
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 12 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 5.2. audio accessory detection audio accessories are detected when the id_con pin resistance to gnd is approximately 1m?. configurations for this audio accessory shown in figure 12 and figure 13 . figure 12. audio accessory with just send/end button (1% or 5% resistors) 604 ? 2 k? id_ con FSA9280A phone headset with remote id detect s 1 s 2 s 3 s 4 s 5 s 6 s 7 s 8 s 9 s 10 s 11 s 12 976 k? send/ end hold right earpiece left earpiece microphone v bus_in dp_ con dm_ con 604 ? 806 ? 806 ? 1.21 k? 2 k? 2 k? 2 k? 2.43 k? 2.8 k? 3.24 k? 3.57 k? figure 13. audio accessory with full wired remote control (1% resistors) the FSA9280A can detect and differentiate between regular key presses, long key presses, and a stuck key . the definition of the key press timing is user configurable by writing the timing set 1 (08h) and timing set 2 (09h) registers. timing diagrams for the key press detection are shown below in figure 14 and figure 15. figure 14. regular key-press timing diagram figure 15. long key-press timing diagram key depressed, timing starts t kp t lkp error key press long key press intb t 0 p read and clear intb released after p read key kp bit set t kp - t 0 = key press bits value t lkp - t 0 = long key press bits value lkp bit set lkr bit set p read and clear p read and clear intb released after p read intb released after p read t kp t lkp t 0 intb key t kp - t 0 = key press bits value t lkp - t 0 = long key press bits value 2 k? id _ con fsa 928 0 a phone headset with send / end only id detect 1 m? send / end right earpiece left earpiece microphone v bus _ in dp _ con dm _ con
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 13 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 5.3. ocp and ovp detection with v bus_in greater than 6.8v, v bus_in is disconnected, protecting the FSA9280A and all application circuitry from excess voltage. this block is capable of withstanding continuous 28v in shutdown mode. upon entering shutdown mode, the ovp_en bit in the interrupt 1 register is set high an d an interrupt is sent to the baseband. the over-current protection (ocp) feature limits current through the charger fet to 1.5a. the FSA9280A automatically senses an over-current event, shuts down v busout , and reports this to the baseband by asserting ocp_en in the interrupt 1 register. ocp m ode is only implemented when v bus_in is provided by the attached accessory. removal of an ovp or ocp condition triggers another interrupt sent to the processor clearing the ocp_en and/or the ovp_en bits and setting the ocp_ovp_dis bit in the interrupt 1 registe r. 6. processor communication typical communication steps between the processor and the FSA9280A during accessory detection are: 1. intb asserted low, indicating change in accessory detection. a) chg_det asserted low if usb charger detected. 2. processor reads interrupt registers to determine which event occurred. a) interrupt 1 (03h): indicates if an attach, detach, key press, long key press, long key release, ovp / ocp event, or ovp / ocp event recovery was detected. each bit can be masked by setting the corresponding bit in the interrupt mask 1 (05h) register. b) interrupt 2 (04h): indicates if a reserved accessory, adc change, stuck key, or stuck key recovery was detected. each bit can be masked by setting the corresponding bit in the interrupt mask 2 (06h) register. 3. processor reads status registers to determine exact accessory detected. a) device type 1 (0ah): indicates which usb, car kit uart, or audio accessory was detected. b) device type 2 (0bh): indicates which factory mode was detected or if a tty cable was detected. c) button 1 (0ch & odh): indicates which button press was detected with audio type 1 accessories. d) car kit status (0eh): indicates which type of car kit charger was detected. 6.1. interrupts the baseband processor recognizes interrupt signals by observing the intb signal, which is active low. interrupts are masked upon reset or power up via the int mask register bit (bit 0 of control register, address 02h in table 7 . register map ) and intb pin defaults low right after this reset or power up. after the int mask bit is cleared by the baseband processor, the intb pin is driven high in preparation for a future interrupt. when an interruptible event occurs, intb transitions low and returns high when the processor reads the interrupt register at address 03h. subsequent to the initial power up or reset; if the processor writes a 1 to int mask bit when the system is already powered up, the intb pin stays high and ignores all interrupts until the int mask bit is cleared. if an event happens that would ordinarily cause an interrupt when the int mask bit is set, the intb pin is low for t int_mask after the int mask bit is cleared. v bat v ddio internal reset intb mask bit 100s intb event standby mode interrupt registers read intb t int_mask switch wait time figure 16. power-up interrupt timing diagram v bat v ddio v ddio reset internal reset intb mask bit 100s intb event standby mode interrupt registers read intb t int_mask switch wait time figure 17. v ddio reset interrupt timing diagram v bat v ddio intb mask bit intb event intb don?t care (high or low) intb event t int_mask figure 18. int mask to intb interrupt timing diagram 7. switch configuration FSA9280A devices have two modes of operation when configuring the internal switches. the FSA9280A can auto- configure the switches or the switches can be configured manually by the processor. typical applications can use the auto-configuration mode and do not require interaction with the baseband to configure the switches correctly.
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 14 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection table 5. auto-configurations usb: dp_con=dp_host dm_con=dm_host v bus_out =v bus_in audio / key pad: dp_con=audio_r dm_con=audio_l mic=v bus_in tty: dp_con=audio_r mic=v bus_in uart ( 13 ) : dp_con=rxd dm_con=txd note: 13. use of fs usb on the uart path requires manual switching, as described in section 11.4 systems with multiple usb controllers. 7.1. manual switching manual switching is enabled by writing the following registers: ? manual switch 1 (13h): configures the switches for dm_con, dp_con, and v bus_in . ? manual switch 2 (14h): configures the chg_det, boot, and jig pins. v bus_in micro usb dm_con dp_con gnd id_con hs usb dp_host dm_host f s usb or uart audio codec audio_r audio_l rxd txd FSA9280A mic charger detect 3:1 mux and charge pump chg_det charger ic v bus_out - detection ocp,ovp vbus_in micro usb dm_con dp_con gnd id_con hs usb dp_host dm_host f s usb or uart audio codec audio_r audio_l rxd txd FSA9280A mic charger detect 3:1 mux and charge pump chg_det charger ic vbus_out - detection ocp,ovp vbus_in micro usb dm_con dp_con gnd id_con hs usb dp_host dm_host f s usb or uart audio codec audio_r audio_l rxd txd FSA9280A mic charger detect 3:1 mux and charge pump chg_det charger ic vbus_out - detection ocp,ovp
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 15 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 8. active signal performance 8.1. usb data figure 19. pass through eye compliance testing input signal figure 20. usb 2.0 eye compliance test results at output 8.2. fs usb figure 21. fs usb eye compliance for uart path 8.3. audio figure 22. thd+n plot for audio channels
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 16 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 9. electrical specifications 9.1. absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v bat /v ddio supply voltage from battery / baseband -0.5 6.0 v v bus_in supply voltage from micro-usb connector -0.5 28.0 v v sw switch i/o voltage usb -1.0 v bus +0.5 v stereo / mono audio path active -1.5 v bat +0.5 all other channels -0.5 v bat +0.5 i ik input clamp diode current - 50 ma i chg charger detect chg_det pin current sink capability 30 ma i sw switch i/o current (continuous) usb 50 ma audio 60 all other channels 50 i swpeak peak switch current (pulsed at 1ms duration, <10% duty cycle) usb 150 ma audio 150 charger fet 2 a all other channels 150 ma t stg storage temperature range - 65 +150 ? c t j maximum junction temperature +150 ? c t l lead temperature (soldering, 10 seconds) +260 ? c esd iec 61000-4-2 system esd usb connector pins (dp_con, dm_con, v bus_in , id_con) to gnd air g ap 15 .0 kv contact 8 .0 human body model, jedec jesd22-a114 jig, boot, intb 3.5 all other pins, including dp_con, dm_con,id_con and vbus_in 5.0 charged device model, jedec jesd22-c101 all pins 2.0 9.2. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit v bat battery supply voltage ( 14 ) 3.0 4.4 v v bus in supply voltage from v bus_in pin ( 15 ) 4. 0 5. 5 v v ddio processor supply voltage 1.8 3.6 v v sw switch i/o voltage usb path active 0 3.6 v audio path active -1.2 1.2 all other pins 0 5.0 id c ap capacitive load on id_con pin for reliable accessory detection 1.0 nf t a operating temperature - 40 + 85 oc note: 14. fairchild does not guarantee operation below 3.0v. 15. between 5.5 to ovp starting voltage, the charger fet is still closed so that charger ic can charge battery even with 5.9~6.0v travel adaptor.
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 17 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 9.3. switch path dc electrical characteristics all typical values are at t a = 25 c unless otherwise specified. symbol parameter v bat (v) conditions t a = -40 to +85c unit min. typ. max. host interface pins (jig, boot, intb, chg -det) v oh output high voltage ( 16 ) 3.0 to 4.4 i oh =2ma 0.7 x v ddio v v ol output low voltage 3.0 to 4.4 i ol =10ma 0.4 v switch off characteristics i off power-off leakage current 0 all data ports except mic v sw =0v to 4.4v 10 a i no switch o pen leakage current with device powered 3.0 to 4.4 v bat =4.4v; i/o pins=0.3v, 4.1v, or floating, except mic -0.1 00 0.001 0.1 00 a i idshrt short-circuit current ( 17 ) 3.0 to 4.4 current limit if id_con=0v 5 ma usb switch on path usb analog signal range 3.0 to 4.4 0 3.6 v r onusb usb switch on resistance ( 18 ) 3.0 to 4.4 v d+/d- =0v, 0.4v, i on =8ma 8 10 ? charging fet on path v ovp over-voltage protection (ovp) threshold voltage 6.2 6.8 7.2 v r onfet charging fet on resistance ( 17 ) v bus_in =4.2v-5.0v, i on =1a 2 00 m? i ocp over-current protection (ocp) threshold current ( 17 ) v bus_in =5.2v 1. 1 1.3 1. 5 a audio_r/audio_l switch on paths audio analog signal range 3.0 to 4.4 -1.2 3.0 v r on audio switch on resistance ( 18 ) 3.0 to 4.4 v l/r =-0.8v, 0.8v, i on =30ma, f=0 -470khz 3 ? r flat audio r on flatness ( 19 ) 3.0 to 4.4 0.1 ? mic and uart switch on paths analog signal range ( 20 ) 3.0 to 4.4 0 5 v r on mic path on resistance 3.0 to 4.4 v sw =0v, 4.4v , i on =30ma 40 ? uart path on resistance ( 17 ) 25 30 total current consumption i ccsl battery supply standby mode current (no accessory attached) 3.0 to 4.4 no accessory static current during standby mode 10 25 a i ccslwa battery supply standby mode current with accessory attached ( 21 ) 3.8 with accessory static current during standby mode 30 40 a notes: 16. does not apply to chg_det or jig pin s because they are open drain. 17. limits based on electrical characterization data. 18. on resistance is the voltage drop between the two terminals at the indicated current through the switch. 19. flatness is defined as the difference between the maximum and minimum values of on resistance over the specified range of conditions. 20. the mic bias applied by the baseband should not exceed 2.8 v. 21. applies to all accessories except audio type 1 and factory-mode accessories.
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 18 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 9.4. capacitance symbol parameter v bat (v) condition t a = -40 to +85c unit min. typ. max. c on usb dp_con , d m_con on capacitance (usb mode) 3.8 v bias =0.2v , f=1mhz 8 pf 9.5. switch path ac electrical characteristics all typical values are for v bat =3.8v at t a =25oc unless otherwise specified. symbol parameter condition t a = -40 to +85c unit min. typ. max. xtalk active channel crosstalk dp_con to dm_con audio mode f=20khz, r t = 32?, c l = 0pf - 50 db u sb mode f=1mhz, r t = 50?, c l =0pf - 60 f=240mhz, r t = 50?, c l =0pf -40 o irr off isolation audio mode f=20khz, r t = 32?, c l = 0pf -90 db u sb mode f=1 mhz, r t = 50?, c l = 0pf -90 psrr power supply rejection ratio , mic on v bus_in power supply noise 300mv pp , f=217hz - 10 0 db thd total harmonic distortion (audio path) 20hz to 20khz, r l =32/16?, input signal range 2v pp 0.03 % 20hz to 20khz, r l =32/16?, input signal range -1.2v to 1.2v 0.05 t sk(p) skew of opposite transitions of the same output (usb mode) t r =t f =750ps (10-90%) at 240mhz, c l =0pf, r l =50? 30 ps t i2crst time when i2c_sda and i2c_scl both low to cause a reset see figure 6 30 ms t intmask time after int mask cleared to 0 until intb goes low to signal the interrupt after interruptible event while int mask bit s et to 1 see figure 18 10 ms t sdpdet time from v bus_in valid to v bus_out valid with charger fet closed and usb switches cl osed for usb standard downstream port see figure 10 130 ms t chgout time from v bus_in valid to v bus_out valid with the charger fet closed for both usb charging ports (cdp and dcp) see figure 9 170 ms t carkit time from v bus_in valid to car kit type 1 or type 2 charger detected see figure 11 200 ms t chgdet time from v bus_out valid to chg_det output low for both usb charging ports (cdp and dcp) and for car kit chargers see figure 9, figure 11 100 ms t iddet time from id_con not floating to intb low to signal accessory attached that is id_con resistance-based only (v bus_in not v alid) see figure 8 200 ms t jigvbus time from v bus_in valid to jig low and v bus_out valid with charger fet closed for both factory mode operation with v bus_in present see figure 25 200 ms time from v bus_in valid to jig low for factory mode operation without v bus_in present see figure 26 200 ms
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 19 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 9.6. i 2 c controller dc characteristics symbol parameter fast mode (400khz) min. max. units v il low-level input voltage -0.5 0.3v ddio v v ih h igh -level input voltage 0.7v ddio v v hys hysteresis of schmitt trigger inputs v ddio >2v 0.05v ddio v v ddio <2v 0.1v ddio v ol1 l ow -level output voltage at 3ma sink current (o pen -drain) v ddio >2v 0 0.4 v v ddio <2v 0. 2v ddio i i 2c input current of i2c_sda and i2c_scl p in s, input voltage 0.26v to 2.34v - 10 10 a c i capacitance for each i/o p in 10 pf 9.7. i 2 c ac electrical characteristics & register m ap symbol parameter fast mode min. max. unit f scl scl clock frequency 0 400 khz t hd;sta hold time (repeated) start condition 0.6 s t low low period of scl clock 1.3 s t high high period of scl clock 0.6 s t su;sta set- up time for repeated start condition 0.6 s t hd;dat data hold time 0 0.9 s t su;dat data set-up time ( 22 ) 100 ns t r rise time of sda and scl signals ( 23 ) 20+0.1c b 300 ns t f fall time of sda and scl signals ( 23 ) 20+0.1c b 300 ns t su;sto set-up time for stop condition 0.6 s t buf bus-free time between stop and start conditions 1.3 s t sp pulse width of spikes that must b e suppressed by the input filter 0 50 ns notes: 22. a fast-mode i 2 c-b us ? device can be used in a standard-mode i 2 c-bus system, but the requirement t su;dat be met. this is automatically the case if the device does not stretch the low period of the scl signal. if such a device does stretch the low period of the scl signal, it must output the next data bit to the sda line t r_max + t su;dat = 1000 + 2 50 = 1250ns (according to the standard-mode i 2 c bus specification) before the scl line is released. 23. c b equals the total capacitance of one bus line in pf. if mixed with high-speed devices, faster fall times are allowed according to the i 2 c specification. figure 23. definition of timing for full-speed mode devices on the i 2 c b us table 6 . i 2 c slave address name size (bits) bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 slave address 8 0 1 0 0 1 0 1 r/w
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 20 table 7 . register map address register type reset value bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 01h device id read 00000000 version id: 0 xb 00 1 vendor id (fairchild): 000 02h control read / write 00011111 reserved: - read xxx - write 000 switch open adc interrupt disable manual switch configuration delay global interrupt mask 0: open all switches 0: report interrupt when detection is complete on id_con 0: automatic configuration disabled, switch configuration based on manual switch registers (13h, 14h) 0: after wait time expires delay configuration indefinitely until this bit is written to 1 by host 0: does not mask interrupts 1: switch based on detection 1: adc change interrupt is disabled 1: automatic configuration is enabled 1: if wait time has expired configure the switches immediately (see figure 2(flow chart)) 1: mask interrupts 03h interrupt 1 read / clear 00000000 ovp & ocp recovery ocp event ovp event long key release long key press key press detach attach 0: ovp and/or ocp event not recovered 0: no ocp event 0: no ovp event 0: no interrupt 1: ovp and/or ocp event recovered 1: ocp event 1: ovp event 1: long key release detected 1: long key press detected 1: key press detected 1: accessory detached 1: accessory attached 04h interrupt 2 read / clear 00000000 reserved: - read xxx - write 000 stuck key recovery stuck key adc change reserved attach reserved: - read x - write 0 0: no interrupt 1: stuck key recovered 1: stuck key detected 1: valid adc detection 1: reserved accessory attached 05h interrupt mask 1 read / write 00000000 ovp & ocp ocp ovp long key release long key press key press detach attach 0: no interrupt mask 1: mask C interrupt 1 [ovp & ocp recovery] 1: mask C interrupt 1 [ocp event] 1: mask C interrupt 1 [ovp event] 1: mask C interrupt 1 [long key release] 1: mask C interrupt 1 [long key press] 1: mask C interrupt 1 [key press] 1: mask C interrupt 1 [detach] 1: mask C interrupt 1 [attach] 06h interrupt mask 2 read / write 00000000 reserved: - read xxx - write 000 stuck key recovery stuck key adc change reserved attach reserved: - read x - write 0 0: no interrupt mask 1: mask C interrupt 2 [stuck key recovery] 1: mask C interrupt 2 [stuck key] 1: mask C interrupt 2 [adc change] 1: mask C interrupt 2 [reserved attach] 07h adc read 00011111 reserved: - read xxx, - write 000 adc value (see table 8) 08h timing set 1 read / write 00000000 key press time (see table 8) adc detection time (see table 8) 09h timing set 2 read / write 00000000 switching wait time (see table 8) long key press time (see table 8) continued on the following page
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 21 address register type reset value bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0ah device type 1 read 00000000 reserved: - read x - write 0 usb charging (dcp) usb charging (cdp) car kit charger uart usb data (sdp) reserved: - read x - write 0 audio type 1 0: no detect 0: no detect 1: usb dedicated charging port (dcp) detected 1: usb charging downstream port (cdp) detected 1: car kit charger detected 1: uart detected 1: usb standard downstream port (sdp) detected 1: audio type 1 accessory detected 0bh device type 2 read 00000000 reserved: - read xx - write 00 tty reserved: - read x - write 0 factory mode C see table 9 0: no detect 0: no detect 1: tty detected 1: jig: uart C boot_off 1: jig: uart C boot_on 1: jig: usb C boot_off 1: jig: usb C boot_on 0ch button 1 read 00000000 button 7 button 6 button 5 button 4 button 3 button 2 button 1 send end 0: not pressed 1: pressed 0dh button 2 read 00000000 reserved: - read xx - write 00 key press error button 12 button 11 button 10 button 9 button 8 0: no key press error 0: not pressed 1: key press error detected (too short) 1: pressed 0eh car kit status read 00000000 reserved: - read xxxxxx - write 000000 charger type 00: no connection 01: reserved charger 10: car kit charger type 1 11: car kit charger type 2 0fh reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 10h reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 11h reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 12h reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 13h manual switch 1 read / write 00000000 dm_con connection dp_con connection v bus connection 000: open dm_con switch 001: dm_con connected to dm_host of usb port 010: dm_con connected to audio_l 011: dm_con connected to txd of uart port 000: open dp_con switch 001: dp_con connected to dp_host of usb port 010: dp_con connected to audio_r 011: dp_con connected to rxd of uart port 00: open vbus switch 01: vbus_out connected to vbus_in (host C current sourced from the phone to accessory , m ax . load current is 5ma) 10: vbus_in connected to mic 11: vbus_in connected to vbus_out (standard usb C phone sinks current from attached accessory) 14h manual switch 2 read / write 00000000 reserved: - read xxx - write 000 chg_det boot jig reserved: - read xxx - write 000 0: high impedance 0: low 0: high impedance 1: low 1: high 1: low continued on the following page
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 22 address register type reset value bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 15h reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 16h reserved n/a xxxxxxx0 reserved: - read xxxxxxxx, - write 00000000 17h reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 18h reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 19h reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 1ah reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 1bh reset r/w x0001000 reserved: - read xxxxxxx, - write 0000100 reset 0: no reset 1: reset (always reads 0) 1ch reserved n/a xxxxx001 reserved: - read xxxxxxxx, - write 00000001 1dh reserved n/a 00000000 reserved: - read xxxxxxxx, - write 00000000 v bus_in valid reserved: - read x, - write 0 0: v bus_in not valid 1: v bus_in valid 1eh reserved n/a xxxxxxx x reserved: - read xxxxxxxx, - write 00000000 1fh reserved n/a xxxxxxx x reserved: - read xxxxxxxx, - write 00000000 20h dcd configuration read/write xxxxxx00 reserved: - read xxxxxxxx, - write 00000000 enable dcd timeout reserved: read xx, - write 00 0: dcd timeout not enabled 1: dcd timeout enabled 21h reserved n/a xxxxxx00 reserved: - read xxxxxxxx, - write 00000000
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 23 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection table 8 C timing for timing set 1 & 2 registers setting value ( 24 ) adc detection time key press time long key press time switching wait time 0000 50ms 100ms 300ms 10ms 0001 100ms 200ms 400ms 30ms 0010 150ms 300ms 500ms 50ms 0011 200ms 400ms 600ms 70ms 0100 300ms 500ms 700ms 90ms 0101 400ms 600ms 800ms 110ms 0110 500ms 700ms 900ms 130ms 0111 600ms 800ms 1000ms 150ms 1000 700ms 900ms 1100ms 170ms 1001 800ms 1000ms 1200ms 190ms 1010 900ms 1300ms 210ms 1011 1000ms 1400ms 1100 1500ms 1101-1111 note: 24. each of the four registers can have unique register setting values. 9.8. factory modes the FSA9280A has four dedicated f ac tory modes that allow efficient factory testing of a platform. factory modes are initiated with the attachment of special test hardware, called a jig box used for factory testing. FSA9280A automatically configures switch paths to any factory-mode accessories when v ddio is present, without detaching and attaching the micro-usb cable. since the processor may not be awake when a factory-mode accessory is detected, i 2 c read acknowledge is not required, nor does the FSA9280A employ a switching wait timer found in the timing set 2 register for the initial switch configuration. a change of resistor on the id_con pin dynamically switches between factory modes and auto-configures the appropriate switch paths without detaching and attaching the cable. jig output signals when a factory-mode accessory is plugged in and boot output signals the baseband processor to boot up, allowing tests to be conducted with and without the baseband processor powered up. as soon as the factory-mode cable is removed, the FSA9280A returns to a standard accessory flow that requires a device detach between accessory type configurations changes (except audio type 1 accessory described in the audio accessory detection section above). the typical key sensing for audio type 1 accessories for wired remote is not active for factory-mode test. 9.8.1. factory-mode accessory detection the different factory-mode accessories with the associated resistor values (1% standard resistors) on the id_con pin, the jig and boot logic states, and switch configurations are listed in table 9. table 9. factory mode auto-configuration table (1% resistors on id_con pin) configuration type v bus_in dp_con dm_con id_con boot jig chg_det factory mode 0 jig: uart boot_on chg fet open ( 25 ) rxd txd 619k? high low hi -z boot_off chg fet open ( 25 ) rxd txd 523k? low low hi -z factory mode 1 jig: usb boot_on chg fet closed dp_host dm_host 301k? high low hi -z boot_off chg fet closed dp_host dm_host 255k? low low hi -z audio type 1 ( 25 ) full remote ( 26 ) audio_r audio_l 1000k? low low hi -z send/end remote ( 26 ) audio_r audio_l 1002k? low low hi -z
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 24 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection notes: 25. the charger fet closes for factory-mode boot on-uart or factory-mode boot off-uart if vbus_in is valid only during the time when the cable is first plugged in or a new id_con resistor is detected. 26. audio-type device configuration is entered as part of the factory-mode flow shown in figure 24 where the id_con pin is not monitored for key presses and jig remains low until the factory jig box is detached from the phone. mic is not connected in this audio type case. figure 24 provides the attach flow diagram for the jig box accessory. if any of the factory modes is first entered and jig=low; then and only then, can the id_con resistor (1m?) dynami cally switch to audio type 1 accessory without a cable detach. for the latter case, factory-mode audio type 1 accessory auto- configures the switches such that: audio_l = dm_con. 27. mic is left unconnected. 28. the typical key sensing for audio type 1 accessories for wired remote is not active for this factory-mode test. figure 24. factory mode flow standby fsa 9280a detects jig attachment intb asserted and switch paths auto- configured per table 9 FSA9280A writes device register and asserts jig low FSA9280A enters standby p reads interrupt registers no yes no id float > 70 ms no exit factory mode accessory flow yes v ddio high? yes yes no id change? rid =factory mode or audio type 1 value
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 25 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection vbus_in v bus >4.0v id resistance xxxxxxxx float jig pin vddio boot pin id detection time 200ms bb wake-up time switch state vbus_out closed open figure 25. factory box attach timing (v bus_in valid) id resistance xxxxxx float jig pin vddio boot pin id detection time 200ms bb wake- up time switch state closed open figure 26. factory box attach timing without v bus_in
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 26 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 10. reference schematic vbus_out dp_con id_con dm_con gnd vbus_in intb sda scl d+ d- audio_r audio_l jig boot txd rxd pmic ap or baseband mic vddio vbat 1.8 ~ 3.6v micro usb connector 1f 1f 1f 2.2 ? 2.2 ? 2.2 ? chg_det v ddio baseband or charger ic optional (leave open if not used) 10k ? 1.2~ 10k ? 1.2~ 10k ? v ddio txd rxd d+ d- audio codec gpio optional (leave open if not used) 1f v bat 100k ? gpio sda scl jig_on mic bias 1pf tvs 1pf tvs 1pf tvs tvs battery v br 32v r on 1.4 ? figure 27. reference schematic
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 27 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 11. layout guidelines 11.1. pcb layout guidelines for h igh -speed usb signal integrity 1. place FSA9280A as close to the usb controller as possible. shorter traces mean less loss, less chance of picking up stray noise, and may radiate less emi. a) keep the distance between the usb controller and the device less than one inch (< 1 in ). b) for best results, this distance should be <18mm. this keeps it less than one quarter (?) of the transmission electrical length. 2. use an impedance calculator to ensure 90? differential impedance for dp_com/dm_con lines. 3. select the best transmission line for the application. a) for example, for a densely populated board, select an edge-coupled differential stripline. 4. minimize the use of vias and keep hs usb lines on same plane in the stack. a) vias are an interruption in the impedance of the transmission line and should be avoided. b) try to avoid routing schemes that generally force the use of at least two vias: one on each end to get the signal to and from the surface. 5. cross lines, only if necessary, orthogonally to avoid noise coupling (traces running in parallel couple). 6. if possible, separate hs usb lines with gnd to improve isolation. a) routing gnd, power, or components close to the transmission lines can create impedance discontinuities. 7. match transmission line pairs as much as possible to improve skew performance. 8. avoid sharp bends in pcb traces; a chamfer or rounding is generally preferred. 9. place decoupling for power pins as close to the device as possible. a) use low-esr capacitors for decoupling if possible. b) a tuned pi filter should be used to negate the effects of switching power supplies and other noise sources if needed. 11.2. layout for gsm/tdma buzz reduc tion there are two possible mechanisms for tdma/gsm noise to negatively impact the FSA9280A device ? s performance. the first is the result of large current draw by the phone transmitter during active signaling when the transmitter is at full or almost full power. with the phone transmitter dumping large amounts of current in the phone gnd plane; it is possible for there to be temporary voltage excursions in the gnd plane if not properly designed. this noise can be coupled back up through the gnd plane into t he FSA9280A device and , although the FSA9280A has very good isolation; if the gnd noise amplitude is large enough, it can result in noise coupling to the v bus_in/mic pin. the second path for gsm noise is through electromagnetic coupling onto the signal lines themselves. in most cases, the noise introduced as a result of this noise is on the v bat and/or gnd supply rails. following are recommendations for pcb board design that help address these two sources of tdma/gsm noise. 1. provide a wide, low-impedance gnd return path to both the FSA9280A and to the power amplifier that sources the phone transmit block. 2. provide separate gnd connections to pcb gnd plane for each device. do not share gnd return paths between devices. 3. add as large a decoupling capacitor as possible ( ? 1 f) between the v bat pin and gnd to shunt any power supply noise away from the FSA9280A. also add decoupling capacitance at the pa (s ee the reference application schematic in figure 27 for recommended decoupling capacitor values) . 4. add 33pf shunt capacitors on any pcb nodes with the potential to collect radiated energy from the phone transmitter. at a minimum, add these 33pf capacitors to the mic pin (see figure 27) . 5. add a series r bat resistor prior to the decoupling capacitor on the v bat pin to attenuate noise prior to reaching the FSA9280A. 11.3. v bus_out load timing requirements the FSA9280A includes over-current protection (ocp) used to protect the FSA9280A and any downstream devices from a high-current event. in addition, the FSA9280A has an inrush-limiting feature that helps protect against high-current transient currents during initial charger fet closure. for these two reasons, it is recommended that the system designer delay current draw >250ma from the FSA9280A v bus_out pin until at least 10ms after v bus_out is valid. failure to observe this timing requirement could result in false ocp triggering and, in some cases, could result in the FSA9280A staying in ocp mode until the load is removed and re-attached.
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 28 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection 11.4. systems with multiple usb controllers many phone platforms have separate f ull -speed and high- speed controllers; however, the FSA9280A only has one designated usb switch path. the FSA9280A high-speed usb path is only designed to allow one hs usb controller to be multiplexed on to the usb connector. to allow for multiple usb controllers on the usb port, it may be tempting to use one of fairchild?s existing usb switches to multiplex the hs and fs controllers onto the shared hs usb switch path of the FSA9280A, as illustrated in figure 28. it is not recommend ed that the usb signals be multiplexed at the input the FSA9280A dp_host or dm_host pins for the fo llowing reasons: ? the FSA9280A employs a passive usb switch path. it does not buffer, amplify, or enhance the usb signal in any way. the FSA9280A is designed to have minimal impact on the hs usb eye performance; however, there is some limited reduction in signal amplitude and edge rate resulting from the inherent resistance and capacitance of the usb switch within the FSA9280A. ? standard usb switches like the fsusb42 are also passive and cannot improve a usb signal. they result in a slight degradation of the hs usb signal as well. ? when placed in series, as shown in figure 28, the cumulative effect of the two series passive usb switches impacts the hs eye performance and could result in failure of the hs eye mask test per the usb 2.0 specification. ? when factoring in the additional routing required for the two switches in series and the additional signal path discontinuities introduced, the likelihood of eye degradation is increased. high speed usb full speed usb fsusb42 (dpdt usb 2.0 switch) d+ d- d+ d- dp_host dm_host FSA9280A vbus dp_con dm_con id gnd connector figure 28. not recommended multiplexing high-speed and full-speed usb onto the dp_host, dm_host for the reasons outlined above, it is recommend that only the hs usb controller be connected to the FSA9280A dp_host and dm_host pins. the following solutions are recommended for those applications that require both a hs and fs usb controller. the FSA9280A must be used for all of these solutions since it has the available uart switch path. the hs usb signal is highly sensitive and should only be routed through the specially designed hs usb signal path of the FSA9280A. conversely, the fs usb signal operates at much slower data rates, which makes it much more resilient to signal path discontinuities. fs usb only operates at 12mbps and has a full 3.6v swing, which makes it much less sensitive to capacitive loading. compar ed to hs usb, fs usb has a large voltage swing, which makes it less sensitive to switch on resistance. therefore, the fs usb signal can be alternately routed through the uart signal path. figure 29 provides an alternative application diagram. baseband full speed usb uart fsusb42 d+ d- FSA9280A vbus dp_con dm_con id gnd connector txd rxd map or v/p high speed usb d+ d- rxd txd dp_host dm_host rxd txd figure 29. recommended configuration for systems with high-speed , f ull-speed, and uart in every case where the fs usb path is not routed through the dedicated usb path of the FSA9280A, the phone designers must place the FSA9280A into manual mode to configure the switch path properly. on initial attachment of a usb accessory, the FSA9280A detects and auto-configures for usb, resulting in the dp_con and dm_con pins being connected to the dp_host and dm_host pins, respectively. in this configuration, the hs usb controller is automatically connected and no further action is need ed by the baseband to send and receive data from the hs controller. for the application shown in figure 29 , the FSA9280A must be changed to manual mode to enable fs usb through the uart txd and rxd switch paths. af ter initial usb detection and attach signaled by the FSA9280A, do the following: 1. write the hex value ?1a? to the control register (02h) (see table 7. register map) . this enables manual switch mode and the FSA9280A automatically opens all switch paths, breaking the hs usb signal path and forcing the usb host to re-enumerate when the fs device is configured. 2. to configure the FSA9280A switch paths such that the fs device is connected through the uart switch path, write the hex value ?6ch? into the manual switch register (13h) >125s later to ensure enumeration. this connects the rxd and txd to dp_ co n and dm_con, respectively. 3. when fs usb data communication is complete, disable manual switch mode by writing ?1e? back in to the control register (02h). 4. configure the fsusb42 input select back to the uart source to allow uart communication.
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 29 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection physical dimensions figure 30. 20 -lead ultrathin molded leadless package (umlp), 3 x 4 x 0.55mm, 0.5mm pitch package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and /or date on the drawing and contact a fairchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of f airchilds worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. please visit fairchild semiconductors online packaging area for the most recent tape and reel speci fications: http://www.fairchildsemi.com/packaging/3x4umlp20_tnr.pdf . part number operating temperature range top mark package FSA9280Aumx -40 to +85c 9280a 20 -lead ultrathin molded leadless package (umlp), 3 x 4 x 0.55mm, 0.5 pitch bottom view top view recommended land pattern side view 2x 2x notes: a. package conforms to jedec mo-220 except where noted. b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994. d. drawing filename: mkt-umlp20arev1. 0.10 c 0.10 c 0.10 c a b 0.05 c pin 1 ident 1 6 7 10 0.55 max 0.05 0.00 0.08 c 0.10 c seating plane (0.15) 1116 17 20 pin1 ident 4.00 3.00 a b c 1.70 1.60 2.70 2.60 20x 0.45 0.35 0.25 0.15 20x 0.50 1.70 2.70 3.80 2.80 0.50 0.30 0.60 20x 20x a e. land pattern recommendation is based on fsc design only
? 20 09 fairchild semiconductor corporation www.fairchildsemi.com FSA9280A ? rev 1.1.0 30 FSA9280A usb port multimedia switch, featuring automatic select and accessory detection
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